NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 21 Memory Protection Unit (MPU)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 391
21.6.1.2 Access evaluation – Privilege violation determination
While the access evaluation macro is making the region hit determination, the logic is also evaluating if
the current access is allowed by the permissions defined in the region descriptor. The protection violation
logic then evaluates the access against the effective permissions using the specification shown in
Table 21-11 .
As shown in Figure 21-10 , the output of the protection violation logic is the error signal.
The access evaluation macro then uses the hit_b and error signals to form two outputs. The combined
(hit_b | error) signal is used to signal the current access is not allowed and (~hit_b & error) is used as the
input to MPU_EDRn (error detail register) in the event of an error.
21.6.2 Putting it all together and AHB error terminations
For each XBAR slave port being monitored, the MPU performs a reduction-AND of all the individual
(hit_b | error) terms from each access evaluation macro. This expression then terminates the bus cycle with
an error and reports a protection error for three conditions:
• If the access does not hit in any region descriptor, a protection error is reported.
• If the access hits in a single region descriptor and that region signals a protection violation, then a
protection error is reported.
• If the access hits in multiple (overlapping) regions and all regions signal protection violations, then
a protection error is reported.
The third condition reflects that priority is given to permission granting over access denying for
overlapping regions as this approach provides more flexibility to system software in region descriptor
assignments. For an example of the use of overlapping region descriptors, see
Section 21.8, Application
information .
In event of a protection error, the MPU requires two distinct actions:
• Intercepting the error during the address phase (first cycle out of two) and cancelling the
transaction before it is seen by the slave device
Table 21-11. Protection violation definition
Description
Inputs Output
eff_rgd[r] eff_rgd[w] eff_rgd[x] Protection violation?
inst fetch read — — 0 yes, no x permission
inst fetch read — — 1 no, access is allowed
data read 0 — — yes, no r permission
data read 1 — — no, access is allowed
data write — 0 — yes, no w permission
data write — 1 — no, access is allowed