
Chapter 24 LIN Controller (LINFlexD)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
515
Offset: 0x8C
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
TDF
B
M
RDFBM
TD
LI
S
RDLIS
ST
OP
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
This field is writable only in Initialization mode (LINCR1[INIT] = 1).
Figure 24-38. Global control register (GCR)
Table 24-35. GCR field descriptions
Field
Description
TDFBM
Transmit data first bit MSB
This field controls the first bit of transmitted data (payload only) as MSB/LSB in both UART and LIN
modes.
0 The first bit of transmitted data is LSB – that is, the first bit transmitted is mapped on the LSB bit
(BDR(0), BDR(8), BDR(16), BDR(24)).
1 The first bit of transmitted data is MSB – that is, the first bit transmitted is mapped on the MSB bit
(BDR(7), BDR(15), BDR(23), BDR(31)).
RDFBM
Received data first bit MSB
This field controls the first bit of received data (payload only) as MSB/LSB in both UART and LIN
modes.
0 The first bit of received data is LSB – that is, the first bit received is mapped on the LSB bit (BDR(0),
BDR(8), BDR(16), BDR(24)).
1 The first bit of received data is MSB – that is, the first bit received is mapped on the MSB bit
(BDR(7), BDR(15), BDR(23), BDR(31)).
TDLIS
Transmit data level inversion selection
This field controls the data inversion of transmitted data (payload only) in both UART and LIN modes.
0 Transmitted data is not inverted.
1 Transmitted data is inverted.
RDLIS
Received data level inversion selection
This field controls the data inversion of received data (payload only) in both UART and LIN modes.
0 Received data is not inverted.
1 Received data is inverted.
STOP
Stop bit configuration
This field controls the number of stop bits in transmitted data in both UART and LIN modes. The stop
bit is configured for all the fields (delimiter, sync, ID, checksum, and payload).
0 One stop bit
1 Two stop bits
Summary of Contents for MPC5605BK
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