NXP Semiconductors MPC5605BK, Reference Manual, Page: 618 / 964

Chapter 26 Deserial Serial Peripheral Interface (DSPI)
MPC5606BK Microcontroller Reference Manual, Rev. 2
616 Freescale Semiconductor
26.5.8 DSPI POP RX FIFO Register (DSPI x _POPR)
The DSPI x _POPR allows you to read the RX FIFO. See Section 26.6.3.5, Receive First In First Out (RX
FIFO) buffering mechanism for a description of the RX FIFO operations. Eight- or 16-bit read accesses to
the DSPI x _POPR fetch the RX FIFO data, and update the counter and pointer.
NOTE
Reading the RX FIFO field fetches data from the RX FIFO. Once the RX
FIFO is read, the read data pointer is moved to the next entry in the RX
FIFO. Therefore, read DSPI
x _POPR only when you need the data. For
compatibility, configure the TLB entry for DSPI x _POPR as guarded.
PCS x Peripheral chip select x
Selects which CS x signals are asserted for the transfer.
0 Negate the CS x signal
1 Assert the CS x signal
Note: Use in SPI master mode only.
TXDATA Transmit data
Holds SPI data for transfer according to the associated SPI command.
Note: Use TXDATA in master and slave modes.
Offset:0x38 Access: Read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R RXDATA
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-9. DSPI POP RX FIFO Register (DSPI x _POPR)
Table 26-21. DSPI x _POPR field descriptions
Field Description
RXDATA Received data
The RXDATA field contains the SPI data from the RX FIFO entry pointed to by the pop next data pointer
(POPNXTPTR).
Table 26-20. DSPI x _PUSHR field descriptions (continued)
Field Description