Chapter 30 Flash Memory
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
843
30.5.2.3
DFlash Secondary Low/Mid Address Space Block Locking Register
(DFLASH_SLL)
The DFlash Secondary Low/Mid Address Space Block Locking Register provides an alternative means to
protect blocks from being modified. These bits, along with bits in the DFLASH_LML register, determine
if the block is locked from program or erase. An OR of DFLASH_LML and DFLASH_SLL determines
the final lock status.
Offset: 0x000C
Access: Read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R SLE
0
0
0
0
0
0
0
0
0
0
STS
L
K
0
0
0
0
W
Reset
Defined by DFLASH_NVSLL at DFlash Test Sector Address 0xC03DF8. This location is user OTP
(One-Time Programmable). The DFLASH_NVSLL register influences only the R/W bits of the DFLASH_SLL
register.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
SLK
W
Reset
Defined by DFLASH_NVSLL at DFlash Test Sector Address 0xC03DF8. This location is user OTP
(One-Time Programmable). The DFLASH_NVSLL register influences only the R/W bits of the DFLASH_SLL
register.
Figure 30-29. DFlash Secondary Low/Mid Address Space Block Locking register (DFLASH_SLL)
Summary of Contents for MPC5605BK
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Page 20: ...MPC5606BK Microcontroller Reference Manual Rev 2 20 Freescale Semiconductor...
Page 103: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 103 Clocks and power...
Page 645: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 643 Timers...
Page 715: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 713 ADC system...
Page 787: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 787 Memory...
Page 893: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 893 Integrity...
Page 943: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 943 Debug...
