NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 2 Introduction
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 41
• Compliant with CAN protocol specification, version 2.0B active
• 64 mailboxes per FlexCAN module
— Mailboxes configurable while module remains synchronized to CAN bus
— Each mailbox configurable as transmit or receive
• Transmit features
— Supports configuration of multiple mailboxes to form message queues of scalable depth
— Arbitration scheme according to message ID or message buffer number
— Internal arbitration to guarantee no inner or outer priority inversion
— Transmit abort procedure and notification
• Receive features
— Individual programmable filters for each mailbox
— Eight mailboxes configurable as a 6-entry receive FIFO
— Eight programmable acceptance filters for receive FIFO
• Programmable clock source
— System clock
— Direct oscillator clock to avoid PLL jitter
• Listen only mode capabilities
• CAN sampler available for connection to one of available CAN module pads
— Supports capturing of first message identifier while in STOP or STANDBY modes
2.4.12 System clocks and clock generation
The following list summarizes the system clock and clock generation on the MPC5606BK:
• System clock can be derived from the following sources
— External crystal oscillator
— FMPLL
— 16 MHz fast internal RC oscillator
• Programmable output clock divider of system clock (

1,

2,

4)
• Separate programmable peripheral bus clock divider ratio (

1,

2,

4) applied to system clock
• Frequency modulated phase-locked loop (FMPLL)
— Input clock frequency from 4 MHz to 16 MHz
— Clock sources: external oscillator or internal FIRC oscillator
— Lock detect circuitry continuously monitors lock status
— Loss of clock (LOC) detection for reference and feedback clocks
— On-chip loop filter
– Improves electromagnetic interference performance
– Reduces number of external components required
• On-chip fast external crystal oscillator supporting 4 MHz to 16 MHz