NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 27 Timers
MPC5606BK Microcontroller Reference Manual, Rev. 2
666 Freescale Semiconductor
UCPRE Prescaler bits
The UCPRE bits select the clock divider value for the internal prescaler of Unified Channel, as
shown in
Table 27-18 .
UCPREN Prescaler Enable bit
The UCPREN bit enables the prescaler counter.
1 = Prescaler enabled
0 = Prescaler disabled (no clock)
DMA Direct Memory Access bit
The DMA bit selects if the FLAG generation will be used as an interrupt request, as a DMA request
or as a CTU trigger. The choice between a DMA request or a CTU trigger is determined by the value
of bit TM in the register CTU_EVTCFGRx (refer to
Chapter 29, Cross Triggering Unit (CTU) ).
1 = Flag/overrun assigned to DMA request or CTU trigger
0 = Flag/overrun assigned to interrupt request
IF Input Filter
The IF field controls the programmable input filter, selecting the minimum input pulse width that can
pass through the filter, as shown in
Table 27-19 . For output modes, these bits have no meaning.
FCK Filter Clock select bit
The FCK bit selects the clock source for the programmable input filter.
1 = Main clock
0 = Prescaled clock
FEN FLAG Enable bit
The FEN bit allows the Unified Channel FLAG bit to generate an interrupt signal or a DMA request
signal or a CTU trigger signal (The type of signal to be generated is defined by the DMA bit).
1 = Enable (FLAG will generate an interrupt request or DMA request or a CTU trigger)
0 = Disable (FLAG does not generate an interrupt request or DMA request or a CTU trigger)
FORCMA Force Match A bit
For output modes, the FORCMA bit is equivalent to a successful comparison on comparator A
(except that the FLAG bit is not set). This bit is cleared by reset and is always read as zero. This bit
is valid for every output operation mode that uses comparator A, otherwise it has no effect.
1 = Force a match at comparator A
0 = Has no effect
Note: For input modes, the FORCMA bit is not used and writing to it has no effect.
FORCMB Force Match B bit
For output modes, the FORCMB bit is equivalent to a successful comparison on comparator B
(except that the FLAG bit is not set). This bit is cleared by reset and is always read as zero. This bit
is valid for every output operation mode that uses comparator B, otherwise it has no effect.
1 = Force a match at comparator B
0 = Has not effect
Note: For input modes, the FORCMB bit is not used and writing to it has no effect.
BSL Bus Select
The BSL field is used to select either one of the counter buses or the internal counter to be used by
the Unified Channel. Refer to
Table 27-20 for details.
Table 27-17. EMIOSC[n] field descriptions
(continued)
Field Description