NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 24 LIN Controller (LINFlexD)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 511
24.10.17 Identifier filter enable register (IFER)
Offset: 0x40 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0
FACT
1
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
This field is writable only in Initialization mode (LINCR1[INIT] = 1).
Figure 24-34. Identifier filter enable register (IFER)
Table 24-29. IFER field descriptions
Field Description
FACT Filter activation (see Table 24-30 )
The software sets the bit FACT[x] to activate the filters x in identifier list mode.
In identifier mask mode bits FACT(2n + 1) have no effect on the corresponding filters as they act as
masks for the Identifiers 2n.
0 Filters 2n and 2n + 1 are deactivated.
1 Filters 2n and 2n + 1 are activated.
Table 24-30. IFER[FACT] configuration
Bit Value Result
FACT[0] 0 Filters 0 and 1 are deactivated.
1 Filters 0 and 1 are activated.
FACT[1] 0 Filters 2 and 3 are deactivated.
1 Filters 2 and 3 are activated.
FACT[2] 0 Filters 4 and 5 are deactivated.
1 Filters 4 and 5 are activated.
FACT[3] 0 Filters 6 and 7 are deactivated.
1 Filters 6 and 7 are activated.
FACT[4] 0 Filters 8 and 9 are deactivated.
1 Filters 8 and 9 are activated.