NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 21 Memory Protection Unit (MPU)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 381
21.5.2.3 MPU Error Detail Register, Slave Port n (MPU_EDR n )
When the MPU detects an access error on slave port n , 32 bits of error detail are captured in this read-only
register and the corresponding bit in the MPU_CESR[SPERR] field set. Information on the faulting
address is captured in the corresponding MPU_EAR
n register at the same time. Note that this register and
the corresponding MPU_EAR n register contain the most recent access error; there are no hardware
interlocks with the MPU_CESR[SPERR] field as the error registers are always loaded upon the occurrence
of each protection violation.
Offsets: 0x014–0x024 (3 registers) Access: Read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R EACD 0 0 0 0 0 0 0 0
W
Reset – – – – – – – – – – – – – – – –
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R EPID EMN EATTR ERW
W
Reset – – – – – – – – – – – – – – – –
Figure 21-4. MPU Error Detail Register, Slave Port n (MPU_EDR n )
Table 21-5. MPU_EDRn field descriptions
Field Description
EACD Error Access Control Detail
This field implements one bit per region descriptor and is an indication of the region descriptor hit
logically ANDed with the access error indication. The MPU performs a reference-by-reference
evaluation to determine the presence/absence of an access error. When an error is detected, the
hit-qualified access control vector is captured in this field.
If the MPU_EDR n register contains a captured error and the EACD field is all zeroes, this signals an
access that did not hit in any region descriptor. All non-zero EACD values signal references that hit in
a region descriptor(s), but failed due to a protection error as defined by the specific set bits. If only a
single EACD bit is set, then the protection error was caused by a single non-overlapping region
descriptor. If two or more EACD bits are set, then the protection error was caused in an overlapping set
of region descriptors.
EPID Error Process Identification
This field records the process identifier of the faulting reference. The process identifier is typically driven
only by processor cores; for other bus masters, this field is cleared.
EMN Error Master Number
This field records the logical master number of the faulting reference. This field is used to determine
the bus master that generated the access error.