NXP Semiconductors MPC5605BK, Reference Manual, Page: 375 / 964

Chapter 21 Memory Protection Unit (MPU)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 375
Chapter 21
Memory Protection Unit (MPU)
21.1 Introduction
The Memory Protection Unit (MPU) provides hardware access control for all memory references
generated in the device. Using preprogrammed region descriptors that define memory spaces and their
associated access rights, the MPU concurrently monitors all system bus transactions and evaluates the
appropriateness of each transfer. Memory references that have sufficient access control rights are allowed
to complete, while references that are not mapped to any region descriptor or have insufficient rights are
terminated with a protection error response.
The MPU module provides the following capabilities:
• Support for 8 program-visible 128-bit (4-word) region descriptors
— Each region descriptor defines a modulo-32 byte space, aligned anywhere in memory
– Region sizes can vary from a minimum of 32 bytes to a maximum of 4 Gbytes
— Two types of access control permissions defined in single descriptor word
– Processors have separate {read, write, execute} attributes for supervisor and user accesses
– Non-processor masters have {read, write} attributes
— Hardware-assisted maintenance of the descriptor valid bit minimizes coherency issues
— Alternate programming model view of the access control permissions word
• Memory-mapped platform device
— Interface to three slave XBAR ports: flash controller, system SRAM controller and peripherals
bus
– Connections to the address phase address and attributes
– Typical location is immediately downstream of the platform’s crossbar switch
A simplified block diagram of the MPU module is shown in Figure 21-1 .