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Chapter 21 Memory Protection Unit (MPU)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
387
21.5.2.5
MPU Region Descriptor Alternate Access Control
n
(MPU_RGDAAC
n
)
Section 21.5.2.4.3, MPU Region Descriptor n, Word 2 (MPU_RGDn.Word2)
that since system software may adjust only the access controls within a region descriptor
(MPU_RGD
n
.Word2) as different tasks execute, an alternate programming view of this 32-bit entity is
desired. If only the access controls are being updated, this operation should be performed by writing to
MPU_RGDAAC
n
(Alternate Access Control n) as stores to these locations do not affect the descriptor’s
valid bit.
The memory address therefore provides an alternate location for updating MPU_RGD
n
.Word2.
Offset: 0x400 + (16 × n) + 0xC (MPU_RGDn.Word3)
Access: Read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
PID
PIDMASK
W
Reset
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VLD
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 21-8. MPU Region Descriptor, Word 3 Register (MPU_RGD
n
.Word3)
Table 21-9. MPU_RGD
n
.Word3 field descriptions
Field
Description
PID
Process Identifier
This field specifies that the optional process identifier is to be included in the determination of whether
the current access hits in the region descriptor. This field is combined with the PIDMASK and included
in the region hit determination if MPU_RGD
n
.Word2[M
x
PE] is set.
PIDMASK
Process Identifier Mask
This field provides a masking capability so that multiple process identifiers can be included as part of
the region hit determination. If a bit in the PIDMASK is set, then the corresponding bit of the PID is
ignored in the comparison. This field is combined with the PID and included in the region hit
determination if MPU_RGD
n
.Word2[M
x
PE] is set. For more information on the handling of the PID
and PIDMASK, see
Section 21.6.1.1, Access evaluation – Hit determination
VLD
Valid
This bit signals the region descriptor is valid. Any write to MPU_RGD
n
.Word{0,1,2} clears this bit,
while a write to MPU_RGD
n
.Word3 sets or clears this bit depending on bit 31 of the write operand.
0 Region descriptor is invalid
1 Region descriptor is valid
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