Chapter 24 LIN Controller (LINFlexD)
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
535
required that allows the LINFlexD FSMs to be reset in case this timeout state is reached or in any other
case. Timeout counter can be rewritten by software at any time to extend timeout period.
24.11.7 Use cases and limitations
•
In LIN slave mode, the DMA capability can be used only if the ID filtering mode is activated. The
number of ID filters enabled must be equal to the number of DMA channels enabled. The
correspondence between channel # and ID filter is based on IFMI (identifier filter match index).
•
In LIN master mode, both the DMA channels (TX and RX) must be enabled in case the DMA
capability is required.
•
In UART mode, the DMA capability can be used only if the UART Tx/Rx buffers are configured
as FIFOs.
•
DMA and CPU operating modes are mutually exclusive for the data/frame transfer on a UART or
LIN node. Once a DMA transfer is finished, the CPU can handle subsequent accesses.
•
Error management must be always executed via CPU enabling the related error interrupt sources.
The DMA capability does not provide support for the error management. Error management means
checking status bits, handling IRQs, and potentially canceling DMA transfers.
•
The DMA programming model must be coherent with the TCD setting defined in this document.
Table 24-48. TCD settings (UART node, RX mode)
TCD Field
Value
Description
8 bits data
16 bits data
CITER[14:0]
M
Multiple iterations for the major loop
BITER[14:0]
M
Multiple iterations for the major loop
NBYTES[31:0]
1
2
Minor loop transfer = 1 or 2 bytes
SADDR[31:0]
BDRM address
SADDR = BDRM + 0x3 for byte transfer
SADDR = BDRM + 0x2 for half-word transfer
SOFF[15:0]
0
No increment (FIFO)
SSIZE[2:0]
0
1
Byte/half-word transfer
SLAST[31:0]
0
DADDR[31:0]
RAM address
DOFF[15:0]
1
2
Byte/half-word increment
DSIZE[2:0]
0
1
Byte/half-word transfer
DLAST_SGA[31:0]
–M
–M × 2
No scatter/gather processing
INT_MAJ
0/1
Interrupt disabled/enabled
D_REQ
1
Only on the last TCD of the chain.
START
0
No software request
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