![NXP Semiconductors MPC5605BK Reference Manual Download Page 604](http://html.mh-extra.com/html/nxp-semiconductors/mpc5605bk/mpc5605bk_reference-manual_1721852604.webp)
Chapter 26 Deserial Serial Peripheral Interface (DSPI)
MPC5606BK Microcontroller Reference Manual, Rev. 2
602
Freescale Semiconductor
26.5.4
DSPI Clock and Transfer Attributes Registers 0–5 (DSPI
x
_CTAR
n
)
The DSPI modules each contain six clock and transfer attribute registers (DSPI
x
_CTAR
n
), which are used
to define different transfer attribute configurations. Each DSPI
x
_CTAR controls:
•
Frame size
•
Baud rate and transfer delay values
•
Clock phase
•
Clock polarity
•
MSB or LSB first
DSPI
x
_CTARs support compatibility with the QSPI module in the MPC5606BK family of MCUs. At the
initiation of an SPI transfer, control logic selects the DSPI
x
_CTAR that contains the transfer’s attributes.
Do not write to the DSPI
x
_CTARs while the DSPI is running.
In master mode, the DSPI
x
_CTAR
n
registers define combinations of transfer attributes such as frame size,
clock phase, and polarity, data bit ordering, baud rate, and various delays. In slave mode, a subset of the
bit fields in the DSPI
x
_CTAR0 and DSPI
x
_CTAR1 registers are used to set the slave transfer attributes.
See the individual bit descriptions for details on which bits are used in slave modes.
When the DSPI is configured as an SPI master, the CTAS field in the command portion of the TX FIFO
entry selects which of the DSPI
x
_CTAR registers is used on a per-frame basis. When the DSPI is
configured as an SPI bus slave, the DSPI
x
_CTAR0 register is used.
Offset: 0x08
Access: Read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
SPI_TCNT
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-4. DSPI Transfer Count Register (DSPIx_TCR)
Table 26-4. DSPI
x
_TCR field descriptions
Field
Description
SPI_TCN
T
SPI transfer counter
Counts the number of SPI transfers the DSPI makes. The SPI_TCNT field is incremented every time the
last bit of an SPI frame is transmitted. A value written to SPI_TCNT presets the counter to that value.
SPI_TCNT is reset to zero at the beginning of the frame when the CTCNT field is set in the executing
SPI command. The transfer counter wraps around, incrementing the counter past 65535 resets the
counter to zero.
Summary of Contents for MPC5605BK
Page 2: ...This page is intentionally left blank...
Page 20: ...MPC5606BK Microcontroller Reference Manual Rev 2 20 Freescale Semiconductor...
Page 103: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 103 Clocks and power...
Page 645: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 643 Timers...
Page 715: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 713 ADC system...
Page 787: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 787 Memory...
Page 893: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 893 Integrity...
Page 943: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 943 Debug...