Analog Devices ADSP-BF53x Blackfin, Reference

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Addressing With the AAU
5-6 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Instructions using Index registers use an M-register or a small immediate
value (+/– 2 or 4) as the modifier. Instructions using Pointer registers use
a small immediate value or another P-register as the modifier. For details,
see
Table 5-3, “AAU Instruction Summary,” on page 5-20 .
Pointer Register File
The general-purpose Address Pointer registers, also called P-registers, are
organized as:
• 6-entry, P-register file
P[5:0]
• Frame Pointer (
FP
) used to point to the current procedure’s activa-
tion record
• Stack Pointer (
SP
) used to point to the last used location on the
runtime stack.
P-registers are 32 bits wide. Although P-registers are primarily used for
address calculations, they may also be used for general integer arithmetic
with a limited set of arithmetic operations; for instance, to maintain
counters. However, unlike the Data registers, P-register arithmetic does
not affect the Arithmetic Status (
ASTAT
) register status flags.
Frame and Stack Pointers
In many respects, the Frame and Stack Pointer registers perform like the
other P-registers,
P[5:0]
. They can act as general pointers in any of the
load/store instructions, for example,
R1 = B[SP] (Z)
. However,
FP
and
SP
have additional functionality.
The Stack Pointer registers include:
• a User Stack Pointer (
USP
in Supervisor mode,
SP
in User mode)
• a Supervisor Stack Pointer (
SP
in Supervisor mode)