Analog Devices ADSP-BF53x Blackfin, Reference

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ADSP-BF53x/BF56x Blackfin Processor Programming Reference 4-43
Program Sequencer
into the
RETI
register prior to jumping to the event vector. A typical inter-
rupt service routine terminates with an
RTI
instruction that instructs the
sequencer to reload the Program Counter,
PC
, from the
RETI
register. The
following example shows a simple interrupt service routine.
isr:
[--SP] = (R7:0, P5:0); /* push core registers */
[--SP] = ASTAT; /* push arithmetic status */
/* place core of service routine here */
ASTAT = [SP++]; /* pop arithmetic status */
(R7:0, P5:0) = [SP++]; /* pop core registers */
RTI; /* return from interrupt */
isr.end:
There is no need to manage the
RETI
register when interrupt nesting is not
enabled. If however, nesting is enabled and the respective service routine
must be interruptible by an interrupt of higher priority, the
RETI
register
must be saved, most likely onto the stack.
Instructions that access the
RETI
register do have an implicit site effect—
reading the
RETI
register enables interrupt nesting. Writing to it disables
nesting again. This enables the service routine to break itself down into
interruptible and non-interruptible sections. For example:
isr:
[--SP] = (R7:0, P5:0); /* push core registers */
[--SP] = ASTAT; /* push arithmetic status */
/* place critical or atomic code here */
[--SP] = RETI; /* enable nesting */
/* place core of service routine here */
RETI = [SP++]; /* disable nesting */
/* more critical or atomic instructions */
ASTAT = [SP++]; /* pop arithmetic status */
(R7:0, P5:0) = [SP++]; /* pop core registers */
RTI; /* return from interrupt */
isr.end: