Analog Devices ADSP-BF53x Blackfin, Reference

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ADSP-BF53x/BF56x Blackfin Processor Programming Reference 19-35
Vector Operations
Vector MIN
General Form
dest_reg = MIN ( src_reg_0, src_reg_1 ) (V)
Syntax
Dreg = MIN ( Dreg , Dreg ) (V) ; /* dual 16-bit operation
(b) */
Syntax Terminology
Dreg
:
R7–0
Instruction Length
In the syntax, comment (b) identifies 32-bit instruction length.
Functional Description
The Vector Minimum instruction returns the minimum value (the most
negative value or the value closest to 0x8000) of the 16-bit half-word
source registers to the
dest_reg
.
This instruction compares the upper half-words of
src_reg_0
and
src_reg_1
and returns that minimum to the upper half-word of
dest_reg
.
It also compares the lower half-words of
src_reg_0
and
src_reg_1
and
returns that minimum to the lower half-word of
dest_reg
. The result is a
concatenation of the two 16-bit minimum values.
The input values are not implicitly modified by this instruction. The
dest_reg
can be the same D-register as one of the source registers. Doing
this explicitly modifies that source register.