Analog Devices ADSP-BF53x Blackfin, Reference

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Using Computational Status
2-24 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
Special Rounding Instructions
The ALU provides the ability to round the arithmetic results directly into
a data register with biased or unbiased rounding as described above. It also
provides the ability to round on different bit boundaries. The options
RND12
,
RND
, and
RND20
round at bit 12, bit 16, and bit 20, respectively,
regardless of the state of the
RND_MOD
bit in
ASTAT
.
For example:
R3.L = R4 (RND) ;
performs biased rounding at bit 16, depositing the result in a half word.
R3.L = R4 + R5 (RND12) ;
performs an addition of two 32-bit numbers, biased rounding at bit 12,
depositing the result in a half word.
R3.L = R4 + R5 (RND20) ;
performs an addition of two 32-bit numbers, biased rounding at bit 20,
depositing the result in a half word.
Using Computational Status
The multiplier, ALU, and shifter update the overflow and other status
flags in the processor’s Arithmetic Status (
ASTAT
) register. To use status
conditions from computations in program sequencing, use conditional
instructions to test the
CC
flag in the
ASTAT
register after the instruction
executes. This method permits monitoring each instruction’s outcome.
The
ASTAT
register is a 32-bit register, with some bits reserved. To ensure
compatibility with future implementations, writes to this register should
write back the values read from these reserved bits.