Analog Devices ADSP-BF53x Blackfin, Reference

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Arithmetic Logic Unit (ALU)
2-30 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
For example:
R3 = R1 + R2, R4 = R1 – R2 (NS) ;
adds the 32-bit contents of
R2
to the 32-bit contents of
R1
and deposits the
result in
R3
with no saturation.
The instruction also subtracts the 32-bit contents of
R2
from that of
R1
and deposits the result in
R4
with no saturation.
A specialized form of this instruction uses the ALU 40-bit result registers
as input operands, creating the sum and differences of the
A0
and
A1
registers.
For example:
R3 = A0 + A1, R4 = A0 – A1 (S) ;
transfers to the result registers two 32-bit, saturated, sum and difference
values of the ALU registers.
ALU Instruction Summary
Table 2-9 lists the ALU instructions. For more information about assem-
bly language syntax and the effect of ALU instructions on the status flags,
see
Chapter 15, “Arithmetic Operations.”
In Table 2-9 , note the meaning of these symbols:
• Dreg denotes any Data Register File register.
• Dreg_lo_hi denotes any 16-bit register half in any Data Register
File register.
• Dreg_lo denotes the lower 16 bits of any Data Register File
register.
• imm7 denotes a signed, 7-bit wide, immediate value.