Analog Devices ADSP-BF53x Blackfin, Reference

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ADSP-BF53x/BF56x Blackfin Processor Programming Reference 15-63
Arithmetic Operations
(TFU) Unsigned fraction with truncation. Multiply 0.16* 0.16 formats to produce 0.32
results. No shift correction. The special case of 0x8000 * 0x8000 yields 0x4000
0000. No saturation is necessary since no shift correction occurs. (Same as the FU
mode.)
Zero extend 0.32 result to 8.32 format before copying or accumulating to Accu-
mulator. Then, saturate Accumulator to maintain 8.32 precision; Accumulator
result is between minimum 0x00 0000 0000 and maximum 0xFF FFFF FFFF.
To extract to half-register, truncate Accumulator 8.32 format value at bit 16. (Per-
form no rounding.) Saturate the result to 0.16 precision and copy it to the destina-
tion register half. Result is between minimum 0 and maximum 1-2
-16
(or,
expressed in hex, between minimum 0x0000 and maximum 0xFFFF).
(S2RND) Signed fraction with scaling and rounding. Multiply 1.15 * 1.15 formats to pro-
duce 1.31 results after shift correction. The special case of 0x8000 * 0x8000 is sat-
urated to 0x7FFF FFFF to fit the 1.31 result. (Same as the Default mode.)
Sign extend 1.31 result to 9.31 format before copying or accumulating to Accumu-
lator. Then, saturate Accumulator to maintain 9.31 precision; Accumulator result
is between minimum 0x80 0000 0000 and maximum 0x7F FFFF FFFF.
To extract to half-register, shift the Accumulator contents one place to the left
(multiply x 2). Round Accumulator 9.31 format value at bit 16. (RND_MOD bit
in the ASTAT register controls the rounding.) Saturate the result to 1.15 precision
and copy it to the destination register half. Result is between minimum -1 and
maximum 1-2
-15
(or, expressed in hex, between minimum 0x8000 and maximum
0x7FFF).
(ISS2) Signed integer with scaling. Multiply 16.0 * 16.0 formats to produce 32.0 results.
No shift correction. (Same as the IS mode.)
Sign extend 32.0 result to 40.0 format before copying or accumulating to Accumu-
lator. Then, saturate Accumulator to maintain 40.0 precision; Accumulator result
is between minimum 0x80 0000 0000 and maximum 0x7F FFFF FFFF.
Extract the lower 16 bits of the Accumulator. Shift them one place to the left
(multiply x 2). Saturate the result for 16.0 format and copy to the destination reg-
ister half. Result is between minimum -2
15
and maximum 2
15
-1 (or, expressed in
hex, between minimum 0x8000 and maximum 0x7FFF).
Table 15-4. Multiply and Multiply-Accumulate to Half-Register
Options (Cont’d)
Option Description