Analog Devices ADSP-BF53x Blackfin, Reference

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ADSP-BF53x/BF56x Blackfin Processor Programming Reference 4-19
Program Sequencer
• A status flag may be copied into
CC
, and the value in
CC
may be
copied to a status flag.
• The
CC
flag bit may be set to the result of a Pointer register
comparison.
• The
CC
flag bit may be set to the result of a Data register
comparison.
• Some shifter instructions (rotate or
BXOR
) use
CC
as a portion of the
shift operand/result.
• Test and set instructions can set and clear the
CC
bit.
These eight ways of accessing the
CC
bit are used to control program flow.
The branch is explicitly separated from the instruction that sets the arith-
metic flags. A single bit resides in the instruction encoding that specifies
the interpretation for the value of
CC
. The interpretation is to “branch on
true” or “branch on false.”
The comparison operations have the form
CC = expr
where expr involves a
pair of registers of the same type (for example, Data registers or Pointer
registers, or a single register and a small immediate constant). The small
immediate constant is a 3-bit (–4 through 3) signed number for signed
comparisons and a 3-bit (0 through 7) unsigned number for unsigned
comparisons.
The sense of
CC
is determined by equal (
==
), less than (
<
), and less than or
equal to (
<=
). There are also bit test operations that test whether a bit in a
32-bit R-register is set.
Conditional Branches
The sequencer supports conditional branches. Conditional branches are
JUMP
instructions whose execution branches or continues linearly, depend-
ing on the value of the
CC
bit. The target of the branch is a PC-relative
address from the location of the instruction, plus an offset. The