Analog Devices ADSP-BF53x Blackfin, Reference

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ADSP-BF53x/BF56x Blackfin Processor Programming Reference 4-67
Program Sequencer
• The
EXCAUSE
field in
SEQSTAT
is updated with an unrecoverable
event code.
• The address of the offending instruction is saved in
RETX
. Note if
the processor were executing, for example, the NMI handler, the
RETN
register would not have been updated; the excepting instruc-
tion address is always stored in
RETX
.
To determine whether an exception occurred while an exception handler
was executing, check
SEQSTAT
at the end of the exception handler for the
code indicating an “unrecoverable event” (
EXCAUSE = 0x25
). If an unre-
coverable event occurred, register
RETX
holds the address of the most
recent instruction to cause an exception. This mechanism is not intended
for recovery, but rather for detection.
Exceptions and the Pipeline
Interrupts and exceptions treat instructions in the pipeline differently.
• When an interrupt occurs, all instructions in the pipeline are
aborted.
• When an exception occurs, all instructions in the pipeline after the
excepting instruction are aborted. For error exceptions, the except-
ing instruction is also aborted.
Because exceptions, NMIs, and emulation events have a dedicated return
register, guarding the return address is optional. Consequently, the
PUSH
and
POP
instructions for exceptions, NMIs, and emulation events do not
affect the interrupt system.
Note, however, the return instructions for exceptions (
RTX
,
RTN
, and
RTE
)
do clear the Least Significant Bit (LSB) currently set in
IPEND
.