Analog Devices ADSP-BF53x Blackfin, Reference

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ADSP-BF53x/BF56x Blackfin Processor Programming Reference 3-5
Operating Modes and States
Protected Memory
Additional memory locations can be protected from User mode access. A
Cacheability Protection Lookaside Buffer (CPLB) entry can be created
and enabled. See
“Memory Management Unit” on page 6-45 for further
information.
Entering User Mode
When coming out of reset, the processor is in Supervisor mode because it
is servicing a reset event. To enter User mode from the Reset state, two
steps must be performed. First, a return address must be loaded into the
RETI
register. Second, an
RTI
must be issued. The following example code
shows how to enter User mode upon reset.
Example Code to Enter User Mode Upon Reset
Listing 3-1 provides code for entering User mode from reset.
Listing 3-1. Entering User Mode from Reset
P1.L = START ; /* Point to start of user code */
P1.H = START ;
RETI = P1 ;
RTI ; /* Return from Reset Event */
START : /* Place user code here */
Return Instructions That Invoke User Mode
Table 3-4 provides a summary of return instructions that can be used to
invoke User mode from various processor event service routines. When
these instructions are used in service routines, the value of the return
address must be first stored in the appropriate event
RETx
register. In the