Analog Devices ADSP-BF53x Blackfin, Reference

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Events and Interrupts
4-44 ADSP-BF53x/BF56x Blackfin Processor Programming Reference
If there is not a need for non-interruptible code inside the service routine,
it is good programming practice to enable nesting immediately. This
avoids unnecessary delay to high priority interrupt routines. For example:
isr:
[--SP] = RETI; /* enable nesting */
[--SP] = (R7:0, P5:0); /* push core registers */
[--SP] = ASTAT; /* push arithmetic status */
/* place core of service routine here */
ASTAT = [SP++]; /* pop arithmetic status */
(R7:0, P5:0) = [SP++]; /* pop core registers */
RETI = [SP++]; /* disable nesting */
RTI; /* return from interrupt */
isr.end:
See “Nesting of Interrupts” on page 4-51 for more details on interrupt
nesting.
Emulation Events, NMI, and Exceptions use a technique similar to “nor-
mal” interrupts. However, they have their own return register and return
instruction counterparts.
Table 4-9 provides an overview.
Table 4-9. Return Registers and Instructions
Name Event Class Return Register Return
Instruction
EMU Emulation RETE RTE
RST Reset RETI RTI
NMI NMI RETN RTN
EVX Exception RETX RTX
Reserved Reserved - -
IVHW Hardware Error RETI RTI
IVTMR Core Timer RETI RTI
IVG7 Interrupt 7 RETI RTI