Renesas H8S/2100 Series, Hardware Manual

Page: 893 / 1024

Section 27 List of Registers
Rev. 1.00 Apr. 28, 2008 Page 867 of 994
REJ09B0452-0100
Register Name Abbreviation
Number
of bits
Address Module
Data
Width Access
States
SCIF address register H SCIFADRH 8 H'FDC4 LPC 8 2
SCIF address register L SCIFADRL 8 H'FDC5 LPC 8 2
LPC channel 4 address register H LADR4H 8 H'FDD4 LPC 8 2
LPC channel 4 address register L LADR4L 8 H'FDD5 LPC 8 2
Input data register 4 IDR4 8 H'FDD6 LPC 8 2
Output data register 4 ODR4 8 H'FDD7 LPC 8 2
Status register 4 STR4 8 H'FDD8 LPC 8 2
Host interface control register 4 HICR4 8 H'FDD9 LPC 8 2
SERIRQ control register 2 SIRQCR2 8 H'FDDA LPC 8 2
SERIRQ control register 3 SIRQCR3 8 H'FDDB LPC 8 2
Port 6 noise canceler enable register P6NCE 8 H'FE00
(PORTS = 0) PORT 8 2
Port 6 noise canceler decision
control register P6NCMC 8 H'FE01
(PORTS = 0) PORT 8 2
Port 6 noise cancel cycle setting
register P6NCCS 8 H'FE02
(PORTS = 0)
PORT 8 2
Port C noise canceler enable register PCNCE 8 H'FE03
(PORTS = 0) PORT 8 2
Port C noise canceler decision
control register PCNCMC 8 H'FE04
(PORTS = 0) PORT 8 2
Port C noise cancel cycle setting
register PCNCCS 8 H'FE05
(PORTS = 0) PORT 8 2
Port G noise canceler enable register PGNCE 8 H'FE06
(PORTS = 0) PORT 8 2
Port G noise canceler decision
control register PGNCMC 8 H'FE07
(PORTS = 0) PORT 8 2
Port G noise cancel cycle setting
register PGNCCS 8 H'FE08
(PORTS = 0) PORT 8 2
Port H input data register PHPIN 8 H'FE0C (Read)
(PORTS = 0) PORT 8 2
Port H data direction register PHDDR 8 H'FE0C (Write)
(PORTS = 0)
PORT 8 2
Port H output data register PHODR 8 H'FE0D
(PORTS = 0) PORT 8 2
Port H Nch-OD control register PHNOCR 8 H'FE0E
(PORTS = 0) PORT 8 2
Port control register 0 PTCNT0 8 H'FE10 PORT 8 2