Renesas H8S/2100 Series, Hardware Manual

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Section 27 List of Registers
Rev. 1.00 Apr. 28, 2008 Page 855 of 994
REJ09B0452-0100
Section 27 List of Registers
The list of registers gives information on the on-chip register addresses, how the register bits are
configured, the register states in each operating mode, the register selection condition, and the
register address of each module. The information is given as shown below.
1. Register addresses (address order)
•
Registers are listed from the lower allocation addresses.
•
For the addresses of 16 bits, the MSB is described.
•
Registers are classified by functional modules.
•
The access size is indicated.
•
H8S/2140B Group compatible register addresses or extended register addresses are selected
depending on the RELOCATE bit in system control register 3 (SYSCR3).
When the extended register addresses are selected, the some register addresses of ICC_1,
TMR_Y, PWMX_0, and PORT are changed. Therefore, the selection with other module
registers that share the same addresses with these registers is not necessary.
2. Register bits
•
Bit configurations of the registers are described in the same order as the register addresses in
section 27.1, Register Addresses (Address Order).
•
Reserved bits are indicated by

in the bit name column.
•
The bit number in the bit-name column indicates that the whole register is allocated as a
counter or for holding data.
•
Each line covers eight bits, and 16-bit register is shown as 2 lines, respectively.
3. Register states in each operating mode
•
Register states are described in the same order as the register addresses in section 27.1,
Register Addresses (Address Order).
•
The register states described here are for the basic operating modes. If there is a specific reset
for an on-chip peripheral module, see the section on that on-chip peripheral module.
4. Register selection conditions
•
Register selection conditions are described in the same order as the register addresses in
section 27.1, Register Addresses (Address Order).
•
For register selection conditions, see section 3.2.2, System Control Register (SYSCR), section
3.2.3, Serial Timer Control Register (STCR), section 26.1.3, Module Stop Control Registers H,
L, A, and B (MSTPCRH, MSTPCRL, MSTPCRA, MSTPCRB), or register descriptions for
each module.
5. Register addresses (classification by type of module)
•
The register addresses are described by modules
•
The register addresses are described in channel order when the module has multiple channels.