Renesas H8S/2100 Series, Hardware Manual

Page: 46 / 1024

Section 1 Overview
Rev. 1.00 Apr. 28, 2008 Page 20 of 994
REJ09B0452-0100
Pin No.
Type Symbol TFP-144V BP-176V TLP-145V I/O Name and Function
NMI 11 F4 E3 Input Nonmaskable interrupt request input
pin
IRQ15
to
IRQ0
17,
19 to 21,
47 to 50,
85, 84,
135 to 133,
24 to 22 G2, H2,
J4, J3,
N6, R6,
P6, M7,
J13, J12,
B6, A6,
C6, K4,
J2, J1 F1, G4,
H4, G1,
L5, M6,
N5, K5,
H12, J11,
C6, B5,
A6, H2,
G3, J4 Input
Interrupts
ExIRQ15
to
ExIRQ6
51 to 58,
12, 10 R7, P7,
M8, R8,
P8, N9,
R9, P9,
F3, E1 L6, M7,
N6, K6,
K7, K8,
N7, M8,
F2, E2 Input
These pins request a maskable
interrupt.
To which pin an IRQ interrupt is
input can be selected from the
IRQn
or
ExIQRn
pin.
(n = 15 to 6)
ETRST
*
2
27 L1 H3 Input
ETMS 28 L2 K4 Input
ETDO 29 L4 J1 Output
ETDI 30 M1 K2 Input
H-UDI
ETCK 31 M2 J3 Input
Interface pins for emulator
Reset by holding the
ETRST
pin to
low level regardless of the H-UDI
activation. At this time, the
ETRST
pin should be held low level for 20
clocks of ETCK. Then, to activate
the H-UDI, the
ETRST
pin should be
set to high level and the pins ETCK,
ETMS, and ETDI should be set
appropriately. In the normal
operation without activating the H-
UDI, pins ETCK, ETMS, ETDI, and
ETDO should be pulled up to high
level. The
ETRST
pin is pulled up
inside the chip.
TMO0
TMO1
TMOX
TMOY 137
3
47
48 B5
B1
N6
R6 A5
C2
L5
M6 Output Waveform output pins with output
compare function
8-bit
timer
(TMR_0,
TMR_1,
TMR_X,
TMR_Y)
TMI0
TMI1
TMIX
TMIY 136
2
58
57 A5
C3
P9
R9 D4
A1
M8
N7 Input Counter event input and count reset
input pins