Section 15 Serial Communication Interface (SCI)
Rev. 1.00 Apr. 28, 2008 Page 450 of 994
REJ09B0452-0100
15.7.2
Data Format (Except in Block Transfer Mode)
Figure 15.22 shows the data transfer formats in smart card interface mode.
•
One frame contains 8-bit data and a parity bit in asynchronous mode.
•
During transmission, at least 2 etu (elementary time unit: time required for transferring one bit)
is secured as a guard time after the end of the parity bit before the start of the next frame.
•
If a parity error is detected during reception, a low error signal is output for 1 etu after 10.5 etu
has passed from the start bit.
•
If an error signal is sampled during transmission, the same data is automatically re-transmitted
after two or more etu.
Ds
D0
D1
D2
D3
D4
D5
D6
D7
Dp
In normal transmission/reception
Output from the transmitting station
Ds
D0
D1
D2
D3
D4
D5
D6
D7
Dp
When a parity error is generated
Output from the transmitting station
DE
Output from
the receiving station
[Legend]
Ds:
Start
bit
D0 to D7 : Data bits
Dp:
Parity
bit
DE:
Error
signal
Figure 15.22 Data Formats in Normal Smart Card Interface Mode
For communication with the IC cards of the direct convention and inverse convention types,
follow the procedure below.
Ds
A
Z
Z
A
Z
Z
Z
Z
A
A
(Z)
(Z) state
D0
D1
D2
D3
D4
D5
D6
D7
Dp
Figure 15.23 Direct Convention (SDIR = SINV = O/
E
= 0)
Summary of Contents for H8S/2100 Series
Page 2: ...Rev 1 00 Apr 28 2008 Page ii of xxvi...
Page 54: ...Section 1 Overview Rev 1 00 Apr 28 2008 Page 28 of 994 REJ09B0452 0100...
Page 92: ...Section 2 CPU Rev 1 00 Apr 28 2008 Page 66 of 994 REJ09B0452 0100...
Page 158: ...Section 5 Interrupt Controller Rev 1 00 Apr 28 2008 Page 132 of 994 REJ09B0452 0100...
Page 244: ...Section 8 8 Bit PWM Timer PWMU Rev 1 00 Apr 28 2008 Page 218 of 994 REJ09B0452 0100...
Page 330: ...Section 10 16 Bit Timer Pulse Unit TPU Rev 1 00 Apr 28 2008 Page 304 of 994 REJ09B0452 0100...
Page 416: ...Section 13 8 Bit Timer TMR Rev 1 00 Apr 28 2008 Page 390 of 994 REJ09B0452 0100...
Page 612: ...Section 18 I 2 C Bus Interface IIC Rev 1 00 Apr 28 2008 Page 586 of 994 REJ09B0452 0100...
Page 706: ...Section 20 LPC Interface LPC Rev 1 00 Apr 28 2008 Page 680 of 994 REJ09B0452 0100...
Page 752: ...Section 21 FSI Interface Rev 1 00 Apr 28 2008 Page 726 of 994 REJ09B0452 0100...
Page 774: ...Section 23 RAM Rev 1 00 Apr 28 2008 Page 748 of 994 REJ09B0452 0100...
Page 1008: ...Section 28 Electrical Characteristics Rev 1 00 Apr 28 2008 Page 982 of 994 REJ09B0452 0100...
Page 1020: ...Rev 1 00 Apr 28 2008 Page 994 of 994 REJ09B0452 0100...
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