Renesas H8S/2100 Series, Hardware Manual

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Section 7 I/O Ports
Rev. 1.00 Apr. 28, 2008 Page 143 of 994
REJ09B0452-0100
7.1 Register Descriptions
Table 7.2 lists each port registers.
Table 7.2 Register Configuration in Each Port
Registers
Port
Number
of Pins DDR DR PIN PCR KMPCR ODR
NCE NCMC NCCS NOCR
Port 1 8 O O O
* 2
O
     
Port 2 8 O O O
* 2
O
     
Port 3 8 O O O
* 2
O
     
Port 4 8 O O O
*
2
      
Port 5 3 O O O
*
2
      
Port 6 8 O O O
* 2

O

O O O

Port 7 8
 
O
      
Port 8 7 O O O
*
2
      
Port 9 8 O O O
*
2
O
     
Port A 8 O

O
 
O
   
Port B 8 O

O O
* 2

O
   
Port C 8 O

O O
*
2

O O O O O
Port D 8 O

O O
*
2

O
  
O
Port E 5
 
O
      
Port F 8 O

O O
* 2

O
  
O
Port G 8 O

O
 
O O O O O
Port H 6 O

O O
*
2

O
  
O
Port I 8
* 1
O

O
 
O
  
O
Port J 8
* 1
O

O O

O
  
O
[Legend]
O: Register exists

: No register exists
Notes: 1. Not supported by TFP-144V and TLP-145V.
2. Valid only when the PORTS bit in the port control register 2 (PTCNT2) is 1.