Renesas H8S/2100 Series, Hardware Manual

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Section 3 MCU Operating Modes
Rev. 1.00 Apr. 28, 2008 Page 70 of 994
REJ09B0452-0100
Bit Bit Name
Initial
Value R/W
Description
1 KINWUE 0 R/W Keyboard Control Register Access Enable
When the RELOCATE bit is cleared to 0, this bit
enables or disables CPU access for the keyboard
matrix interrupt registers (KMIMRA and KMIMR), pull-
up MOS control register (KMPCR), and registers
(TCR_X/TCR_Y, TCSR_X/TCSR_Y, TICRR/TCORA_Y,
TICRF/TCORB_Y, TCNT_X/TCNT_Y, TCORC,
TCORA_X, TCORB_X, TCONRI, and TCONRS) of 8-bit
timers (TMR_X and TMR_Y)
0: Enables CPU access for registers of TMR_X and
TMR_Y in areas from H'(FF)FFF0 to H'(FF)FFF7 and
from H'(FF)FFFC to H'(FF)FFFF
1: Enables CPU access for the keyboard matrix
interrupt registers and input pull-up MOS control
register in areas from H'(FF)FFF0 to H'(FF)FFF7 and
from H'(FF)FFFC to H'(FF)FFFF
When the RELOCATE bit is set to 1, this bit is disabled.
For details, see section 3.2.4, System Control Register
3 (SYSCR3) and section 27, List of Registers.
0 RAME 1 R/W RAM Enable
Enables or disables on-chip RAM.
0: On-chip RAM is disabled
1: On-chip RAM is enabled