Renesas H8S/2100 Series, Hardware Manual

Page: 799 / 1024

Section 24 Flash Memory
Rev. 1.00 Apr. 28, 2008 Page 773 of 994
REJ09B0452-0100
(3) Flash Program/Erase Frequency Parameter (FPEFEQ: General Register ER0 of CPU)
FPEFEQ sets the operating frequency of the CPU. The operating frequency available in this LSI
ranges from 8 MHz to 20 MHz.
Bit Bit Name
Initial
Value R/W Description
31 to 16
  
Unused
These bits should be cleared to 0.
15 to 0 F15 to F0

R/W Frequency Set
These bits set the operating frequency of the CPU. The
setting value must be calculated as follows:
1. Round off the operating frequency expressed in MHz
unit at the third decimal place to make it into two
decimal places.
2. Multiply the rounded number by 100 and convert the
result into binary and write it to FPEFEQ (general
register ER0).
For example, when the operating frequency of the CPU
is 20.000 MHz, the setting value is as follows:
1. Round 20.000 off at the third decimal place as
20.00.
2. Convert 20.00
×
100 = 2000 into a binary number
and set B'0000 0111 1101 0000 (H'07D0) in ER0.