Renesas H8S/2100 Series, Hardware Manual

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Section 8 8-Bit PWM Timer (PWMU)
Rev. 1.00 Apr. 28, 2008 Page 215 of 994
REJ09B0452-0100
The lower four bits in PWMREG specify the position of pulses added to the 16 basic pulses. The
additional pulse adds a high period (when PHnS = 0) at the resolution width before the rising edge
of the basic pulse. Although there is no rising edge of the basic pulse when the upper four bits in
PWMREG is B'0000, the timing for adding pulses is the same. Table 8.7 shows the additional
pulse positions corresponding to the basic pulses, and figure 8.8 shows an example of additional
pulse timing.
Table 8.7 Additional Pulse Positions Corresponding to Basic Pulse
Basic Pulse Number
Lower 4
Bits
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
B'0000
B'0001 O
B'0010 O O
B'0011 O O O
B'0100 O O O O
B'0101 O O O O O
B'0110 O O O O O O
B'0111 O O O O O O O
B'1000 O O O O O O O O
B'1001 O O O O O O O O O
B'1010 O O O O O O O O O O
B'1011 O O O O O O O O O O O
B'1100 O O O O O O O O O O O O
B'1101 O O O O O O O O O O O O O
B'1110 O O O O O O O O O O O O O O
B'1111 O O O O O O O O O O O O O O O
No pulse added
Pulse added
Resolution width
Additional pulse
Figure 8.8 Example of Additional Pulse Timing (Upper 4 Bits in PWMREG = B'1000)