Renesas H8S/2100 Series, Hardware Manual

Page: 872 / 1024

Section 26 Power-Down Modes
Rev. 1.00 Apr. 28, 2008 Page 846 of 994
REJ09B0452-0100
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MSTPCRA
Bit Bit Name Initial Value R/W Corresponding Module
7 MSTPA7 1 R/W Reserved
The initial value should not be changed.
6 MSTPA6 1 R/W Duty period measurement timer_0 (TDP_0)
5 MSTPA5 1 R/W Duty period measurement timer_1 (TDP_1)
4 MSTPA4 1 R/W Duty period measurement timer_2 (TDP_2)
3 MSTPA3 1 R/W CIR interface (CIR)
2 MSTPA2 1 R/W FSI interface (FSI) *
1 MSTPA1 0 R/W 14-bit PWM timer (PWMX)
0 MSTPA0 0 R/W Reserved
The initial value should not be changed.
Note: * Before accessing registers of the FSI interface, clear bit 0 in MSTPCRL (MSTP0) and
bit 2 in MSTPCRA (MSTPA2) to 0.
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MSTPCRB
Bit Bit Name Initial Value R/W Corresponding Module
7 MSTPB7 1 R/W Reserved
The initial value should not be changed.
6 MSTPB6 1 R/W Reserved
The initial value should not be changed.
5 MSTPB5 1 R/W Keyboard buffer control unit_3 (PS2_3)
4 MSTPB4 1 R/W I
2
C bus interface_2 (IIC_2)
3 MSTPB3 1 R/W Serial communication interface with FIFO (SCIF)
2 MSTPB2 1 R/W Cycle measurement timer_2 (TCM_2)
Cycle measurement timer_3 (TCM_3)
1 MSTPB1 1 R/W Cycle measurement timer_0 (TCM_0)
Cycle measurement timer_1 (TCM_1)
0 MSTPB0 1 R/W 8-bit PWMU timer_A (TWMU_A)
8-bit PWMU timer_B (TWMU_B)