Section 24 Flash Memory
Rev. 1.00 Apr. 28, 2008 Page 817 of 994
REJ09B0452-0100
The sequence of new bit-rate selection is shown in figure 24.21.
Host
Boot program
Setting a new bit rate
H'06 (ACK)
Waiting for one-bit period
at the specified bit rate
H'06 (ACK) with the new bit rate
H'06 (ACK) with the new bit rate
Setting a new bit rate
Setting a new bit rate
Figure 24.21 New Bit-Rate Selection Sequence
(5) Transition to Programming/Erasing State
The boot program will transfer the erasing program and erase the data in the user MATs first , then
the data in the user boot MATs. On completion of this erasure, ACK will be returned and the
program will enter the programming/erasing state.
The host should select the device code, clock mode, and new bit rate with device selection, clock-
mode selection, and new bit-rate selection commands, and then send the command for the
transition to programming/erasing state. These procedures should be carried out before sending of
the programming selection command or program data.
Command H'40
•
Command, H'40, (one byte): Transition to programming/erasing state
Response H'06
•
Response, H'06, (one byte): Response to transition to programming/erasing state
The boot program will send ACK when the user MATs and the user boot MATs have been
erased by the transferred erasing program.
Error Response
H'C0
H'51
•
Error response, H'C0, (one byte): Error response to the bland check of the user boot MATs
•
Error code, H'51, (one byte): Erasing error
An error occurred and erasure was not completed.
Summary of Contents for H8S/2100 Series
Page 2: ...Rev 1 00 Apr 28 2008 Page ii of xxvi...
Page 54: ...Section 1 Overview Rev 1 00 Apr 28 2008 Page 28 of 994 REJ09B0452 0100...
Page 92: ...Section 2 CPU Rev 1 00 Apr 28 2008 Page 66 of 994 REJ09B0452 0100...
Page 158: ...Section 5 Interrupt Controller Rev 1 00 Apr 28 2008 Page 132 of 994 REJ09B0452 0100...
Page 244: ...Section 8 8 Bit PWM Timer PWMU Rev 1 00 Apr 28 2008 Page 218 of 994 REJ09B0452 0100...
Page 330: ...Section 10 16 Bit Timer Pulse Unit TPU Rev 1 00 Apr 28 2008 Page 304 of 994 REJ09B0452 0100...
Page 416: ...Section 13 8 Bit Timer TMR Rev 1 00 Apr 28 2008 Page 390 of 994 REJ09B0452 0100...
Page 612: ...Section 18 I 2 C Bus Interface IIC Rev 1 00 Apr 28 2008 Page 586 of 994 REJ09B0452 0100...
Page 706: ...Section 20 LPC Interface LPC Rev 1 00 Apr 28 2008 Page 680 of 994 REJ09B0452 0100...
Page 752: ...Section 21 FSI Interface Rev 1 00 Apr 28 2008 Page 726 of 994 REJ09B0452 0100...
Page 774: ...Section 23 RAM Rev 1 00 Apr 28 2008 Page 748 of 994 REJ09B0452 0100...
Page 1008: ...Section 28 Electrical Characteristics Rev 1 00 Apr 28 2008 Page 982 of 994 REJ09B0452 0100...
Page 1020: ...Rev 1 00 Apr 28 2008 Page 994 of 994 REJ09B0452 0100...
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Page 1024: ...H8S 2117R Group Hardware Manual...