Renesas H8S/2100 Series, Hardware Manual

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Section 12 16-Bit Duty Period Measurement Timer (TDP)
Rev. 1.00 Apr. 28, 2008 Page 336 of 994
REJ09B0452-0100
Bit Bit Name
Initial
Value R/W Description
5 TWDMNUDF 0 R/(W) * Pulse Width Lower Limit Underflow
This flag indicates that the waveform pulse width measured
in cycle measurement mode is below the lower limit
specified in TDPWDMN.
[Setting condition]
•
When TDPICR is less than TDPWDMN
[Clearing condition]
•
Reading TWDMNUDF when TWDMNUDF = 1 and then
writing 0 to TWDMNUDF
4 TPDMXOVF 0 R/(W) * Cycle Upper Limit Overflow
This flag indicates that the waveform period measured in
cycle measurement mode has exceeded the upper limit
specified in TDPPDMX.
[Setting condition]
•
When TDPICR is greater than TDPPDMX
[Clearing condition]
•
Reading TPDMXOVF when TPDMXOVF = 1 and then
writing 0 to TPDMXOVF
3 ICPF 0 R/(W)
*
Input Capture Generation
In timer mode, this flag indicates that the value in TDPCNT
was transferred to TDPICR when an input capture signal
was generated. This flag is set when the input capture
signal selected by the IEDG bit is generated on the
TDPCYI input pin.
In cycle measurement mode, this flag indicates that the
value in TDPCNT was transferred to TDPICR when the
rising or falling edge of the PWM waveform was detected.
[Setting condition]
•
When an input capture signal is generated
[Clearing condition]
•
Reading ICPF when ICPF = 1 and then writing 0 to
ICPF