Section 5
Interrupt Controller
Rev. 1.00 Apr. 28, 2008 Page 99 of 994
REJ09B0452-0100
5.3.7
Keyboard Matrix Interrupt Mask Registers (KMIMRA KMIMR)
Wake-Up Event Interrupt Mask Registers (WUEMR)
The KMIMR and WUEMR registers enable or disable key-sensing interrupt inputs (
KIN15
to
KIN0
) and wake-up event interrupt inputs (
WUE15
to
WUE8
).
•
KMIMRA
Bit
Bit Name
Initial Value R/W
Description
7
6
5
4
3
2
1
0
KMIMR15
KMIMR14
KMIMR13
KMIMR12
KMIMR11
KMIMR10
KMIMR9
KMIMR8
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Keyboard Matrix Interrupt Mask
These bits enable or disable a key-sensing input
interrupt request (KIN15 to KIN8).
0: Enables a key-sensing input interrupt request
1: Disables a key-sensing input interrupt request
•
KMIMR
Bit
Bit Name
Initial Value R/W
Description
7
6
5
4
3
2
1
0
KMIMR7
KMIMR6
KMIMR5
KMIMR4
KMIMR3
KMIMR2
KMIMR1
KMIMR0
1
0/1
*
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Keyboard Matrix Interrupt Mask
These bits enable or disable a key-sensing input
interrupt request (KIN7 to KIN0).
0: Enables a key-sensing input interrupt request
1: Disables a key-sensing input interrupt request
When the EIVS bit in SYSCR3 is cleared to 0, the
KMIMR6 bit also simultaneously controls enabling
and disabling of the IRQ6 interrupt request. In this
case, the initial value of the KMIMR6 bit is 0. When
the EIVS bit is set to 1, the initial value of the
KMIMR6 bit becomes 1.
Note:
*
The initial value is 0 when EIVS = 0 and the initial value is 1 when EIVS = 1.
Summary of Contents for H8S/2100 Series
Page 2: ...Rev 1 00 Apr 28 2008 Page ii of xxvi...
Page 54: ...Section 1 Overview Rev 1 00 Apr 28 2008 Page 28 of 994 REJ09B0452 0100...
Page 92: ...Section 2 CPU Rev 1 00 Apr 28 2008 Page 66 of 994 REJ09B0452 0100...
Page 158: ...Section 5 Interrupt Controller Rev 1 00 Apr 28 2008 Page 132 of 994 REJ09B0452 0100...
Page 244: ...Section 8 8 Bit PWM Timer PWMU Rev 1 00 Apr 28 2008 Page 218 of 994 REJ09B0452 0100...
Page 330: ...Section 10 16 Bit Timer Pulse Unit TPU Rev 1 00 Apr 28 2008 Page 304 of 994 REJ09B0452 0100...
Page 416: ...Section 13 8 Bit Timer TMR Rev 1 00 Apr 28 2008 Page 390 of 994 REJ09B0452 0100...
Page 612: ...Section 18 I 2 C Bus Interface IIC Rev 1 00 Apr 28 2008 Page 586 of 994 REJ09B0452 0100...
Page 706: ...Section 20 LPC Interface LPC Rev 1 00 Apr 28 2008 Page 680 of 994 REJ09B0452 0100...
Page 752: ...Section 21 FSI Interface Rev 1 00 Apr 28 2008 Page 726 of 994 REJ09B0452 0100...
Page 774: ...Section 23 RAM Rev 1 00 Apr 28 2008 Page 748 of 994 REJ09B0452 0100...
Page 1008: ...Section 28 Electrical Characteristics Rev 1 00 Apr 28 2008 Page 982 of 994 REJ09B0452 0100...
Page 1020: ...Rev 1 00 Apr 28 2008 Page 994 of 994 REJ09B0452 0100...
Page 1023: ......
Page 1024: ...H8S 2117R Group Hardware Manual...