Renesas H8S/2100 Series, Hardware Manual

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Section 19 Keyboard Buffer Control Unit (PS2)
Rev. 1.00 Apr. 28, 2008 Page 609 of 994
REJ09B0452-0100
19.4.10 First KCLK Falling Interrupt
An interrupt can be generated by detecting the first falling edge of KCLK on reception and
transmission. Software standby mode and watch mode can be cancelled by a first KCLK falling
interrupt.
•
Reception
When both KBIOE and KBE are set to 1, KCIF is set after the first falling edge of KCLK has
been detected.
At this time, if KCIE is set to 1, the CPU is requested an interrupt.
KCIF is set at the same time when the RXCR3 to RXCR0 bits in KBCRL are incremented
from B'0000 to B'0001.
•
Transmission
When both KBIOE and KBTS are set to 1, the KCIF is set after the first falling edge of KCLK
has been detected.
At this time, if KCIE is set to 1, the CPU is requested an interrupt.
KCIF is set at the same time when the TXCR3 to TXCR0 bits in KBCR2 are incremented from
B'0000 to B'0001.
•
Determining interrupt generation
By checking the KBE, KBTS, and KBTE bits, it can be determined whether the first KCLK
falling interrupt is occurred during reception or transmission.
During reception: KBE = 1
During transmission: KBTS = 1 or KBTE = 1 (Check KBTE = 1 because the KBTS is
automatically cleared after transfer has been completed.)
KD
Interrupt
internal
signal
KCLK
1
0 1
2 3
Start bit Start bit
0000 0001 0010
RXCR3
to RXCR0
Interrupt generated
Interrupt
internal
signal
Interrupt generated
KD
KCLK
1
I/O inhibit
0 1
2
0000 0001 0010
TXCR3
to TXCR0
(a) Reception (b) Transmission
Figure 19.15 Timing of First KCLK Interrupt