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Auxiliary Area Allocations by Address
Appendix D
A562
00
Error
Counter 0
Reset Bit
Turn ON this bit to reset the Error
Counter 0 Present Value and turn
OFF the Error Counter 0 Error Flag.
---
---
Cleared
---
---
01
Error
Counter 0
Disable Bit
Turn ON this bit to hold the present
value of error counter 0.
ON: Error
counter value
held.
OFF: Error
counter value
not held.
---
Cleared
---
---
A563
00
Error
Counter 1
Reset Bit
Turn ON this bit to reset the Error
Counter 1 Present Value and turn
OFF the Error Counter 0 Error Flag.
---
---
Cleared
---
---
01
Error
Counter 1
Disable Bit
Turn ON this bit to hold the present
value of error counter 1.
ON: Error
counter value
held.
OFF: Error
counter value
not held.
---
Cleared
---
---
A566
02
Socket
Force-close
Switch
All sockets are forcibly closed when
this bit turns ON.
Turned OFF by Unit after sockets are
closed.
ON: Request to
Close
OFF: Closed
---
Cleared
When the
bit sets
ON, all
the
socket
will close.
Then the
bit will
OFF.
---
04
Automatic
Clock
Adjustment
Switch
The automatic clock adjustment is
executed when this bit turns ON.
Turned OFF by Unit after automatic
clock adjustment has been com-
pleted.
ON: Execute
OFF: Complete
---
Cleared
When the
bit sets
ON, PLC
time
update,
Then
update
PLC time
com-
pletely,
the bit
OFF.
---
A567
00
Openning
Flag
(Socket 1)
The status of TCP/UDP Socket 1 is
ON during open processing. (Turns
ON when open request is received.)
OFF when open processing has
been completed.
ON: Opening
OFF: Closed
---
Cleared
When
socket 1
status is
opening,
the bit will
ON. After
socket 1
status is
opened,
the bit is
OFF.
---
01
Receiving
Flag
(Socket 1)
The status of TCP/UDP Socket 1 is
ON during receive processing.
(Turns ON when receive request is
received.) OFF when receive pro-
cessing has been completed.
ON: Start
receive
OFF: Receive
---
Cleared
When
socket 1
is waiting
to receive
data.
---
02
Sending
Flag
(Socket 1)
The status of TCP/UDP Socket 1 is
ON during send processing. (Turns
ON when send request is received.)
OFF when send processing has
been completed.
ON: Start send
OFF: Send
---
Cleared
When
socket 1
starts
sending,
the bit will
ON. After
data is
sent, the
bit will
OFF.
---
Addresses
Name
Function
Settings
Status
after
mode
change
Status at
startup
Write
timing
Related
Flags,
Settings
Word
Bits
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......