133
Index Registers
Section 4-11
Note
Be sure to use PLC memory addresses in Index Registers.
D1001 and D1000
stored in IR0
or
Actual memory address of
CIO 0 (0000C000 hex)
stored in IR0
Contents of IR0 stored in
D01001 and D01000
D02001 and D02000
stored in IR0
or
Actual memory address
CIO 5 (0000C005 hex)
stored in IR0
Contents of IR0 stored in
D02001 and D02000
Peripheral servicing
Read D01001
and D01000
Read D02001
and D02000
IR storage words for task 2
IR storage words for task 1
or
or
Task 1
Task 2
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......