568
Startup Operation
Section 10-8
Wiring for Analog Outputs
Note
(1) If necessary, connect the shield to the FG terminal to prevent noise.
(2) When an input is not being used, short the + and – terminals.
(3) Separate wiring from power lines (AC power supply lines, high-voltage
lines, etc.)
(4) When there is noise in the power supply line, install a noise filter on the
input section and the power supply.
(5) When external power is supplied, or when the power is interrupted, there
may be a pulse status analog output of up to 1 ms. If this status is a prob-
lem, take the following measures.
• Turn ON the power to the CP1L-EL/EM CPU Unit, check the operation
status, and then turn ON the power at the load.
• Turn OFF the power to the load and then turn OFF the power to the
CP1L-EL/EM CPU Unit.
!Caution
When connecting the analog option board to an outside analog device, either
ground the 0 V side of the PLC’s external power supply or do not ground the
PLC’s external power supply at all. Otherwise the PLC’s external power sup-
ply may be shorted depending on the connection methods of the outside ana-
log device. DO NOT ground the 24 V side of the PLC’s external power supply,
as shown in the following diagram.
10-8 Startup Operation
After the power is turned ON, analog option board starts the initialization pro-
cess. If the initialization finishes normally, the initialization completed flag in
related status area (Refer to
10-4-2 Auxiliary Area Allocation
: A435) will be
set. Therefore, status monitor content must be added in ladder. Only when
the initialization process has finished, user can use the A/D conversion data
or write the output data.
The analog input data will be 0000 until the initial processing is completed.
COM
V OUT
Analog
I/O
Option
Board
Analog
device with
voltage
input
FG
2-core shielded
twisted-pair cable
+
−
24 V
0 V
0 V
Non-insulated DC power supply
0 V
Analog Device
FG
FG
FG
Twisted-pair
cable
FG
CPU Unit + Analog Option Board
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......