695
Auxiliary Area Allocations by Address
Appendix D
A26
04
Error Counter
Error Flag 0
This flag turns ON when an error
occurs in the error counter for
inverter positioning 0.
ON: Error
counter error
OFF: No error
---
Cleared
When
pulse out-
put to error
counter is
stopped
and abso-
lute value
of error
counter
present
value is
greater
than or
equal to
error
counter
error
detection
value
---
05
Error Counter
Pulse Output
Flag 0
This flag is ON while pulses are
being output to the output counter for
inverter positioning 0.
ON: Pulses
being output
OFF: Pulse
output
stopped
---
Cleared
When
pulse out-
put to error
counter 0
is started
---
06
Error Counter
Pulse Output
Acceleration/
Deceleration
Flag 0
This flag is ON while pulse output to
the output counter for inverter posi-
tioning 0 is accelerating or decelerat-
ing.
ON: Pulse
output to the
error counter
is accelerat-
ing or decel-
erating (i.e.,
the fre-
quency is
changing)
OFF: Pulse
output to the
error counter
is constant
---
Cleared
When
pulse out-
put fre-
quency to
error
counter is
changed
by ACC or
PLS2
instruction
---
07
Error Counter
Alarm Flag 0
This flag turns ON when an alarm
occurs in the error counter for
inverter positioning 0.
ON: Error
counter alarm
OFF: No error
counter alarm
---
Cleared
When
pulse out-
put to error
counter is
stopped
and abso-
lute value
of error
counter
present
value is
greater
than or
equal to
error
counter
alarm
detection
value
---
15
Inverter Posi-
tioning Output
Value Sign
Flag 0
This flag is ON when the inverter
positioning 0 output value is positive
and is OFF when it is negative.
ON: Positive
value
OFF: Nega-
tive value
---
Cleared
When
signed out-
put value is
between
0000 0000
and 7FFF
FFFF hex
---
A28
and
A29
---
Present Value
of Pulse Out-
put to Inverter
0, Relative
Value
These words contain the relative
value of the internal pulse output
when pulses are being output to the
error counter for inverter positioning
0.
Data range: 8000 0000 to 7FFF
FFFF hex (
−
2,147,483,648 to
2,147,483,647)
---
---
Cleared
Every error
counter 0
cycle
---
Address
Name
Function
Settings
Status
after
mode
change
Status
at star-
tup
Write
timing
Related
flags, set-
tings
Words
Bits
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......