6
Features and Main Functions
Section 1-1
Versatile Pulse
Control (CPU Units
with Transistor
Outputs Only)
Positioning and speed control by a pulse-input servo driver is enabled by out-
putting fixed duty ratio pulse output signals from the CPU Unit's built-in out-
puts.
• Pulse outputs for 2 axes at 100 kHz maximum are provided as standard
features. (See note.)
Note
The instruction used to control each output point determines
whether it is used as a normal output, pulse output, or PWM output.
Full Complement of Pulse
Output Functions
Select CW/CCW Pulse Outputs or Pulse Plus Direction Outputs for the
Pulse Outputs
The pulse outputs can be selected to match the pulse input specifications of
the motor driver.
Easy Positioning with Absolute Coordinate System Using Automatic
Direction Setting
For operations in an absolute coordinate system (i.e., when the origin is
established or when the PV is changed by the INI instruction), the CW/CCW
direction can be automatically set when PULSE OUTPUT instructions are
executed according to whether the specified number of output pulses is more
or less than the pulse output PV.
Triangular Control
If the amount of output pulses required for acceleration and deceleration (the
target frequency times the time to reach the target frequency) exceeds the
preset target number of output pulses during positioning (when the ACC
instruction in independent mode or the PLS2 instruction is executed), the
acceleration and deceleration will be shortened and triangular control will be
executed instead of trapezoidal control. In other words, the trapezoidal pulse
output will be eliminated, with no period of constant speed.
Target Position Changes during Positioning (Multiple Start)
While positioning using a PULSE OUTPUT (PLS2) instruction is in progress,
the target position, target speed, acceleration rate, and deceleration rate can
be changed by executing another PLS2 instruction.
Built-in outputs
(Functions assigned.)
2 pulse outputs
100 kHz
MAC Address:
01234567890A
01
COM
03
05
07
09
11
01
03
05
07
09
11
00
NC
02
04
06
08
10
00
02
04
06
08
10
BKUP
ERR/ALM
LNK/ACT
SYSMAC
CP1L
POWER
RUN
INH
1
00
01
02
03
04
06
00
01
03
04
06
COM
02
COM
05
07
COM
COM(V+)
05
07
ANALOG INPUT
V1+ V2+ COM
2
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......