30
Specifications
Section 2-2
2-2-2
I/O Memory Details
Type
EM CPU Units
EL CPU Units
Model
CP1L-EM40DR-D
CP1L-EM40DT-D
CP1L-EM40DT1-D
CP1L-EM30DR-D
CP1L-EM30DT-D
CP1L-EM30DT1-D
CP1L-EL20DR-D
CP1L-EL20DT-D
CP1L-EL20DT1-D
I/O
Areas
Input bits
24 bits
CIO 0.00 to CIO 0.11
CIO 1.00 to CIO 1.11
18 bits
CIO 0.00 to CIO 0.11
CIO 1.00 to CIO 1.05
12 bits
CIO 0.00 to CIO 0.11
Output
bits
16 bits
CIO 100.00 to CIO 100.07
CIO 101.00 to CIO 101.07
12 bits
CIO 100.00 to CIO 100.07
CIO 101.00 to CIO 101.03
8 bits
CIO 100.00 to CIO 100.07
1:1 Link
Bit Area
256 bits (16 words): CIO 3000.00 to CIO 3015.15 (words CIO 3000 to CIO 3015)
Serial PLC
Link Area
1,440 bits (90 words): CIO 3100.00 to CIO 3189.15 (words CIO 3100 to CIO 3189)
Work bits
4,800 bits (300 words): CIO 1200.00 to CIO 1499.15 (words CIO 1200 to CIO 1499)
6,400 bits (400 words): CIO 1500.00 to CIO 1899.15 (words CIO 1500 to CIO 1899)
15,360 bits (960 words): CIO 2000.00 to CIO 2959.15 (words CIO 2000 to CIO 2959)
9,600 bits (600 words): CIO 3200.00 to CIO 3799.15 (words CIO 3200 to CIO 3799)
37,504 bits (2,344 words): CIO 3800.00 to CIO 6143.15 (words CIO 3800 to CIO 6143)
Work bits
8,192 bits (512 words): W000.00 to W511.15 (words W0 to W511)
TR Area
16 bits: TR0 to TR15
HR Area
8,192 bits (512 words): H0.00 to H511.15 (words H0 to H511)
AR Area
Read-only (Write-prohibited) 7,168 bits (448 words): A0.00 to A447.15 (words A0 to A447)
Read/Write 8,192 bits (512 words): A448.00 to A959.15 (words A448 to A959)
Timers
4,096 bits: T0 to T4095
Counters
4,096 bits: C0 to C4095
DM Area
32 Kwords: D0 to D32767
Note
Initial data can be transferred to the CPU Unit's built-in flash
memory using the data memory initial data transfer function.
A setting in the PLC Setup can be used so that the data in
flash memory is transferred to RAM at startup.
DM fixed allocation words for Modbus-RTU Easy Master
D32200 to D32249 for Serial Port 1, D32300 to D32349 for Serial
Port 2
DM fixed allocation words for socket service D32400 to D32477 for
Ethernet port
10 Kwords: D0 to D9999 and
D32000 to D32767
Note
Initial data can be trans-
ferred to the CPU Unit's
built-in flash memory
using the data memory
initial data transfer func-
tion. A setting in the PLC
Setup can be used so that
the data in flash memory
is transferred to RAM at
startup.
DM fixed allocation words for
Modbus-RTU Easy Master
D32300 to D32349 for Serial
Port 1
DM fixed allocation words for
socket service D32400 to
D32477 for Ethernet port
Data Register
Area
16 registers (16 bits): DR0 to DR15
Index Register
Area
16 registers (16 bits): IR0 to IR15
Task Flag Area
32 flags (32 bits): TK0 to TK31
Trace Memory
4,000 words (500 samples for the trace data maximum of 31 bits and 6 words.)
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......