352
Inverter Positioning
Section 7-3
Read/Write Area
Note
Present Values of High-speed Counter and Pulse Outputs
The present value of the high-speed counter when inverter positioning is used
is stored in the same memory location as for normal high-speed counter appli-
cation. This value can be used as the present value of feedback pulses from
the encoder, i.e., as the absolute position of inverter positioning. Target value
and range comparisons for high-speed counters are also valid.
The present value of the pulse output (A276/A277 or A278/A279), i.e., the
pulse output value to the error counter, is an absolute position if an absolute
coordinate system is specified and is a relative position if a relative coordinate
system is specified.
A278 00 to 15 Lower 4 digits of the
present value of the
internal pulse output
(absolute value for
absolute coordi-
nates)
8000 0000 to 7FFF
FFFF hex
(
−
2,147,483,648 to
2,147,483,647)
Contains absolute movement value
from the internal pulse origin when
pulses are output to error counter.
Cleared to zero at following times:
• When power to CPU Unit is turned ON
• When operation is started
Updated at following times:
• Cyclically on error counter cycle
This value can be
used to monitor the
present value of
the internal pulse
output as an abso-
lute value when
using absolute
coordinates.
A279 00 to 15 Upper 4 digits of the
present value of the
internal pulse output
(absolute value for
absolute coordi-
nates)
Word
Bits
Function
Data range
Refresh timing
Application
examples
Word
Bits
Function
Data range
Refresh
timing
Application
A562
00
Inverter
positioning 0
Error Counter
Reset Bit
Turned ON: Error counter 0
present value (A22) reset and
Error Counter Error Flag cleared.
---
Turn ON this bit to
clear the error
counter error status.
01
Error Counter
Disable Bit
While ON: Error counter value
held.
---
Turn ON this bit, for
example, to disable
accumulating
pulses in the error
counter when stop-
ping positioning and
moving the motor
shaft manually.
02 to 15 Not used.
A563
00
Inverter
positioning 1
Error Counter
Reset Bit
Turned ON: Error counter 0
present value (A32) reset and
Error Counter Error Flag cleared.
---
Turn ON this bit to
clear the error
counter error status.
01
Error Counter
Disable Bit
While ON: Error counter value
held.
---
Turn ON this bit, for
example, to disable
accumulating
pulses in the error
counter when stop-
ping positioning and
moving the motor
shaft manually.
02 to 15 Not used.
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......