289
Pulse Outputs
Section 7-2
Ladder Program
Cyclic Task (Task 0)
Built-in Input 0 Interrupt Task (Interrupt Task 140)
* Select 0.1 ms for the setting units in the PLC Setup.
Scheduled Interrupt Task 0 (Interrupt Task 2)
#0000
MSKS(690)
0100
P_First_Cycle_Task
Task Start Flag
Built-in interrupt input 0
(IN0.04)
Unmask (Enable
interrupts.)
MSKS(690)
#0005
0014
A280.04
Pulse Output 0
Output In-progress
Flag
Scheduled interrupt 2
(Reset start)
Scheduled interrupt time
(5 x 0.1 ms* = 0.5 ms)
#0000
#0000
&100000
SPED(885)
MSKS(690)
#0001
&100000
#0000
0014
PULS(886)
#0000
P_On
Always ON
Flag
Pulse output 0
Relative pulse
specification
Number of output pulses
(100,000 pulses)
Pulse output 0
Specifies CW/CCW outputs,
CW direction, and
independent mode.
Target frequency
(100,000 Hz)
Scheduled interrupt 0
Stop scheduled interrupt
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......