241
Pulse Outputs
Section 7-2
■
Setting Functions Using Instructions and PLC Setup
■
Input Terminal Block Arrangements
CPU Unit with 20 I/O Points
CPU Unit with 30 I/O Points
CPU Unit with 40 I/O Points
Output
terminal
block
When the
instructions to
the right are not
executed
When a pulse output instruction
(SPED, ACC, PLS2, or ORG) is executed
When the origin search
function is enabled in
the PLC Setup, and an
origin search is
executed by the ORG
instruction
When the PWM
instruction is
executed
Word
Bit
Normal output
Fixed duty factor pulse output
Variable duty
factor pulse output
CW/CCW
Pulse plus direction
When the origin search
function is used
PWM output
CIO
100
00
Normal output 0
Pulse output 0 (CW)
fixed
Pulse output 0 (pulse)
fixed
---
---
01
Normal output 1
Pulse output 0 (CCW)
fixed
Pulse output 0 (direction)
fixed
---
PWM output 0
02
Normal output 2
Pulse output 1 (CW)
fixed
Pulse output 1 (pulse)
fixed
---
---
03
Normal output 3
Pulse output 1 (CCW)
fixed
Pulse output 1 (direction)
fixed
---
PWM output 1
04
Normal output 4
---
---
Origin search 0 (Error
counter reset output)
---
05
Normal output 5
---
---
Origin search 1 (Error
counter reset output)
---
06
Normal output 6
---
---
---
---
07
Normal output 7
---
---
---
---
CIO
101
00 to
07
Normal output 8
to 15
---
---
---
Upper Terminal Block
(Example: DC Power
Supply Models)
Pulse 0: Origin proximity input signal
Pulse 1: Origin proximity input signal
Pulse output 0: Origin input signal
Pulse output 1: Origin input signal
COM
01
03
05
07
00
02
04
06
NC
+
−
09
11
08
10
COM
01
03
05
07
00
02
04
06
NC
+
−
09
11
08
10
01
03
05
00
02
04
NC
Upper Terminal Block
(Example: DC Power
Supply Models)
Pulse 0: Origin proximity input signal
Pulse 1: Origin proximity input signal
Pulse output 0: Origin input signal
Pulse output 1: Origin input signal
Upper Terminal Block
(Example: DC Power
Supply Models)
Pulse 0: Origin proximity input signal
Pulse 1: Origin proximity input signal
Pulse output 0: Origin input signal
Pulse output 1: Origin input signal
COM
01
03
05
07
00
02
04
06
NC
+
−
09
11
08
10
01
03
05
00
02
04
07
09
11
06
08
10
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......