230
High-speed Counters
Section 7-1
■
I/O Allocations
Input Terminals
Note
The high-speed counter inputs are enabled when the Use high speed counter
0 Option is selected in the PLC Setup’s Built-in Input Tab.
Output Terminals
Auxiliary Area Addresses for High-speed Counter 0
Range Comparison Table
The range comparison table is stored in D10000 to D10039.
■
PLC Setup
Select the Use high speed counter 0 Option in the PLC Setup’s Built-in Input
Tab.
Input terminal
Usage
Word
Bit
CIO 0
00
High-speed counter 0 phase-A input (See note.)
01
High-speed counter 0 phase-B input (See note.)
02
Start measurement by pushbutton switch (normal input).
03
Detect trailing edge of measured object (normal input).
04
Detect leading edge of measured object for high-speed counter 0
phase-Z/reset input (see note). Bit status is reflected in A531.00.
05 to 11
Not used. (normal input)
CIO 1
00 to 11
Not used. (normal input)
Output terminal
Usage
Word
Bit
CIO 100
00
Normal input
PL1: Dimension pass output
01
Normal input
PL2: Dimension fail output
02 to 07
Normal input
Not used.
CIO 101
00 to 07
Normal input
Not used.
Function
Address
PV storage words
Leftmost 4 digits
A271
Rightmost 4 digits
A270
Range Comparison
Condition Met Flag
Range 1 Comparison Condition Met Flag
A274.00
Comparison In-
progress Flag
ON when a comparison operation is being exe-
cuted for the high-speed counter.
A274.08
Overflow/Underflow
Flag
ON when an overflow or underflow has occurred
in the high-speed counter’s PV. (Used only when
the counting mode is set to Linear Mode.)
A274.09
Count Direction Flag
0: Decrementing
1: Incrementing
A274.10
Reset Bit
Used for the PV software reset.
A531.00
High-speed Counter
Gate Bit
When ON, the counter's PV will not be changed
even if pulse inputs are received for the counter.
A531.08
Item
Setting
High-speed counter 0
Use high speed counter 0
Counting mode
Linear mode
Circular Max. Count
---
Reset method
Software reset
Input Setting
Up/Down inputs
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......