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560
Analog Output Option Board
Section 10-6
Wiring for Analog Inputs
To prevent noise, 2-core shielded twisted-pair cable should be used. And the
shield can be connected to the FG terminal if necessary.
Note
(1) If necessary, connect the shield to the FG terminal to prevent noise.
(2) When an input is not being used, short the + and – terminals.
(3) Separate wiring from power lines (AC power supply lines, high-voltage
lines, etc.)
(4) When there is noise in the power supply line, install a noise filter on the
input section and the power supply.
!Caution
When connecting the analog option board to an outside analog device, either
ground the 0 V side of the PLC’s external power supply or do not ground the
PLC’s external power supply at all. Otherwise the PLC’s external power sup-
ply may be shorted depending on the connection methods of the outside ana-
log device. DO NOT ground the 24 V side of the PLC's external power supply,
as shown in the following diagram.
10-6 Analog Output Option Board
Each CP1W-DAB21V Analog Output Option Board provides two analog outputs.
• The analog output signal range is 0 to 10 V (with a resolution 1/4,000).
Main Analog Output Option Board Specifications
V IN
COM
I IN
V IN
COM
I IN
Analog
device with
voltage
output
Analog
Input
Option
Board
+
−
+
−
Analog
device with
current
output
Analog
Input
Option
Board
2-core shielded
twisted-pair cable
2-core shielded
twisted-pair cable
FG
FG
24 V
0 V
0 V
Non-insulated DC power supply
0 V
Analog Device
FG
FG
FG
Twisted-pair
cable
FG
CPU Unit + Analog Option Board
Item
Specifications
Voltage Output
Current Output
Output signal range
0 V to 10 V
---
External output allowable load resistance
2 k
Ω
min.
---
External output impedance
0.5
Ω
max.
---
Resolution
1/4,000 (full scale)
---
Overall accuracy
25°C: ±0.5% 0 to 55°C: ±1.0%
---
D/A conversion data
0000 to 0FA0 hex
---
Conversion time
Inner conversion time 2ms/point
Refresh time > 6ms basing on baud rate and PLC cycle time
Isolation method
None
Current consumption
5 VDC: 60 mA max.
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......