72
Fail-safe Circuits
Section 3-1
3-1
Fail-safe Circuits
Always set up safety circuits outside of the PLC to prevent dangerous condi-
tions in the event of errors in the CP1L-EL/EM CPU Unit or external power
supply. In particular, be careful of the following points.
Supply Power to the
CP1L-EL/EM CPU Unit
before the Controlled
System
If the PLC's power supply is turned ON after the controlled system's power
supply, outputs in Units such as DC Output Units may malfunction momen-
tarily. To prevent any malfunction, add an external circuit that prevents the
power supply to the controlled system from going ON before the power supply
to the PLC itself.
Managing CPU Unit
Errors
When any of the following errors occurs, PLC operation (program execution)
will stop and all outputs from Output Units will be turned OFF.
• A CPU error (watchdog timer error) or CPU on standby
• A fatal error (memory error, I/O bus error, duplicate number error, too
many I/O points error, I/O setting error, program error, cycle time too long
error, or FALS(007) error) (See note.)
Always add any circuits necessary outside of the PLC to ensure the safety of
the system in the event of an error that stops PLC operation.
Note
When a fatal error occurs, all outputs from Output Units will be turned OFF
even if the IOM Hold Bit has been turned ON to protect the contents of I/O
memory. (When the IOM Hold Bit is ON, the outputs will retain their previous
status after the PLC has been switched from RUN/MONITOR mode to PRO-
GRAM mode.)
Managing Output
Malfunctions
It is possible for an output to remain ON due to a malfunction in the internal
circuitry of the Output Unit, such as a relay or transistor malfunction. Always
add any circuits necessary outside of the PLC to ensure the safety of the sys-
tem in the event that an output fails to go OFF.
Interlock Circuits
When the PLC controls an operation such as the clockwise and counterclock-
wise operation of a motor and if there is any possibility of an accident or
mechanical damage due to faulty PLC operation, provide an external interlock
such as the one shown below to prevent both the forward and reverse outputs
from turning ON at the same time.
Example
This circuit prevents outputs MC1 and MC2 from both being ON at the same
time even if both PLC outputs CIO 100.00 and CIO 100.01 are both ON, so
the motor is protected even if the PLC is programmed improperly or malfunc-
tions.
CP1L-EL/EM
MC2
CIO
100.00
MC1
CIO
100.01
MC1
MC2
Interlock circuit
Motor clockwise
Motor counterclockwise
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......