LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 775 / 882

ML62Q1000
Series User's Manual
Chapter 27 LCD Driver
FEUL62Q1000 27-25
27.3 Description of Operation
27.3.1 Operation of LCD Driver Circuit LCD
Figure 27-3 shows the LCD driver circuit operation.
Figure 27-3 LCD Driver Circuit Operation
①
A system reset stops the operation of bias generation circuit and LCD driver and the common output and segment
output pins get high impedance state.
②
Select segments by setting the segment mode register. The output pins of selected segment make a Vss level
output.
③
Set the frame frequency and duty by the display mode register (DSPMOD). The common output pins
corresponding to the selected duties make a Vss level output.
④
Set the bias generation circuit operation mode by the bias control register (BIASCON).
⑤
To use a display type other than external supply mode, turn on the bias generation circuit by setting BSON bit of
the bias control register (BIASCON) to "1".
⑥
Set display data in the display registers (DSPR00 to DSPR64).
⑦
Wait for the bias activation time (tBIAS ) or longer. Then set to the display mode using the LMD1 and LMD0
bits of the display control register (DSPCON). (The display waveform is output to common output and segment
output pins.)
For the bias activation time (tBIAS ), refer to the electrical characteristics in the data sheet.
27.3.2 Display Register Segment Map
Figure 27-4 shows the segment map configuration of the display registers (DSPR00 to DSPR64).
Figure 27-4 Display Register Segment Map Configuration
System reset
BIASCON.BSON
LMD1, LMD0
LCD bias voltage
V
L1
to V
L3
Common output
COM0 to COM7
Segment output
SEG0 to SEG64
Operating state
LCD bias voltage generated
Common output waveform
Segment output waveform
BIAS activation time (t
BIAS
)
(1) (4)(5) (6)(7)
HiZ output
(2) (3)
Operating state Reset
HiZ output
DSPR00[7]
SEG
0
COM0
COM1
：
COM7
：
DSPR00[1]
DSPR00[0]
DSPR01[7]
：
DSPR01[1]
DSPR01[0]
SEG
1
SEG
6
3
SEG
6
4
DSPR63[7]
：
DSPR63[1]
DSPR63[0]
DSPR64[7]
：
DSPR64[1]
DSPR64[0]