LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 319 / 882

ML62Q1000 Series User's Manual
Chapter 8 16-Bit Timer
FEUL62Q1000 8-28
8.3.3.2 External Input Count Timing
If the external input is chosen for a count clock, counting up is executed through sampling the external input with the
timer clock to detect a rising edge.
Figure 8-12 shows the count timing when using the external input.
EXTRGn input
after sampling
TMHnC
Timer clock
EXTRGn input
n n+1 n+2
△
External input sampling timing
▲ Count up timing
THnSTAT
Timer
start
Timer
stop
Figure 8-12 External Input Count Timing
Figure 8-13 shows a setting example when using the external input.
Start
End
Set the port as
input mode
Choose an external
input pin
When using EXTRG0 : P02IE=1
When using EXTRG1 : P03IE=1
Set the external
input for the count
clock
When using EXTRG0 : THnEXS=0
When using EXTRG1 : THnEXS=1
THnEX=1
Choose a timer
clock
Choose the external input sampling clock
THnCS=0: LSCLK
THnCS=1: HSCLK
Figure 8-13 Example of External Input Count Setting
[Note]
Ÿ
The pulse with the width less than two clocks of the timer clock may be ignored. Always input the
external input signal with the width equal to or more than two clocks of the timer clock.
Ÿ
The external input signal (EXTRGn) which is input to the 16-bit timer is the signal that has passed
the sampling controller of the external interrupt function. The sampling of the external interrupt
function is optional. See Chapter 18 "External Interrupt Function" for details.