LAPIS Semiconductor ML62Q1000 Series, User Manual, Page: 499 / 882

ML62Q1000 Series User's Manual
Chapter 13 I2C Master
FEUL62Q1000 13-8
13.2.5 I
2
C Master n Control Register (I2MnCON:n=0,1)
I2UnCON is a special function register (SFR) used to control transmission and reception operations.
Address: 0xF6E8(I2M0CON), 0xF6F8(I2M1CON)
Access: R/W
Access size: 8bit
Initial value:
0x00
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Word
-
Byte
- I2MnCON
Bit
- - - - - - - -
I2MnA
CT
- - - -
I2MnR
S
I2MnS
P
I2MnS
T
R/W R R R R R R R R R/W R R R R W W R/W
Initial
value
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
No.
Bit symbol
name
Description
7 I2MnACT This bit is used to set the acknowledgment data to be output at completion of reception.
0: Acknowledgment data "0" (initial value)
1: Acknowledgment data "1"
6 to 3 -
Reserved bit
2 I2MnRS This bit is a write-only and used to request a restart.
When "1" is written to this bit during data communication, the LSI shifts to the restart
condition and the communication restarts from the slave address.
"1" can be written to the I2MnRS bit only while communication is active (I2MnST = "1").
The I2MnRS bit always returns "0" for reading.
0: No restart request (initial value)
1: Restart request
1 I2MnSP This bit is a write-only and used to request a stop condition.
When "1" is written to this bit, the LSI shifts to the stop condition and the communication
stops.
The I2MnSP bit always returns "0" for reading.
When "1" is written to the I2MnSP bit, the I2MnSP bit is reset to "0".
0: No stop condition request (initial value)
1: Stop condition request
0 I2MnST This bit is used to control the communication operation of the I2C bus master.
When "1" is written to this bit, the communication starts.
When "1" is overwritten to this bit in a next data transmission/reception wait state after
transmission/reception of acknowledgment, the data transmission/reception restarts.
When "0" is written to this bit, the communication is stopped forcibly.
"1" can be written to the I2MnST bit only when the I2C bus unit is in an operation enable state
(I2UM0EN ="1").
When "1" is written to the I2MnSP bit, the I2MnST bit is reset to "0".
0: Stops communication (initial value)
1: Starts communication
[Note]
Ÿ
Do not update the I2MnACT bit by using the bit symbol. Update it by using a byte access, not so that
unintented bits are changed by the bit access instructions.
Ÿ
When the I2MnST bit is " 1 " , write the I2MnCON register in the control register setting wait state.